Concurrent checking of clock signal correctness

This paper presents a novel concept for concurrently checking the correctness of signals of clock distribution networks of synchronous systems. A VLSI circuitry is then proposed that, based on such a concept, performs the concurrent checking of such signals with respect to permanent and temporary (i.e., transient and intermittent) faults (permanently or temporary) changing their waveforms with respect to those expected in the fault-free case. Such a circuitry is in turn self-checking with respect to its possible permanent, as well as temporary, internal, realistic faults.