FAVALLI, Michele
FAVALLI, Michele
Dipartimento di Ingegneria
"Victim gate" crosstalk fault model
file con accesso da definire2004 Favalli, Michele
A Boolean model for delay fault testing of emerging digital technologies based on ambipolar devices
2018 Dalpasso, Marcello; Bertozzi, Davide; Favalli, Michele
A Built-In Self-Testing Framework for Asynchronous Bundled-Data NoC Switches Resilient to Delay Variations
file con accesso da definire2016 Miorandi, Gabriele; Bertozzi, Davide; Favalli, Michele; Celin, Alberto
A Complete Self-Testing and Self-Configuring NoC Infrastructure for Cost-Effective MPSoCs
file con accesso da definire2013 Ghiribaldi, Alberto; Ludovici, Daniele; F., Trivino; Strano, Alessandro; J., Flich; J. L., Sanchez; F., Alfaro; Favalli, Michele; Bertozzi, Davide
A fuzzy model for path delay fault detection
file con accesso da definire2005 Favalli, Michele
A Probabilistic Fault Model for “Analog” Faults in Digital CMOS Circuits
file con accesso da definire1992 Favalli, M.; Olivo, P.; Ricco, B.
A SAT Based Test Generation Method for Delay Fault Testing of Macro Based Circuits
file con accesso da definire2011 Mele, Santino; Favalli, Michele
A scalable bidimensional randomization scheme for tlc 3d nand flash memories
2021 Favalli, M.; Zambelli, C.; Marelli, A.; Micheloni, R.; Olivo, P.
A Synthesis Toolflow for the Predictable Implementation of High-Performance Bundled-Data Asynchronous NoCs on FPGA
2025 Chessa, Giuseppe; Bellodi, Elena; Favalli, Michele; Zoni, Davide; Bertozzi, Davide
AIDA4Edge: Twinning for Excellence in Adaptive Edge Artificial Intelligence
2025 Andjelkovic, Marko; Syed, Rizwan Tariq; Veronesi, Alessandro; Vargas, Fabian; Ulbricht, Markus; Poehls, Leticia Bolzani; Krstic, Milos; Bertozzi, Davide; Jones, Edward G.; Rhodes, Oliver; Zese, Riccardo; Favalli, Michele; Bizzarri, Alice; Lamma, Evelina; Gavanelli, Marco; Bellodi, Elena; Peric, Zoran; Nikolic, Jelena; Dincic, Milan; Jovanovic, Aleksandra; Ciric, Dejan; Vucic, Nikola; Peric, Sofija; Jovanovic, Jelena; Stojanovic, Milica; Nikolic, Tatjana; Nikolic, Goran; Nedeljkovic, Jelena; Dankovic, Danijel; Zivanovic, Emilija; Marjanovic, Milos; Veljkovic, Sandra; Mitrovic, Nikola; Predic, Bratislav; Milovanovic, Tamara
An evolutionary approach to the design of on chip pseudorandom test generators
file con accesso da definire2002 Dalpasso, M.; Favalli, Michele
Annotated bit flip fault model
file con accesso da definire2004 Favalli, Michele
Applications of Boolean Satisfiability to Verification and Testing of Switch-Level Circuits
file con accesso da definire2014 Favalli, Michele; Marcello, Dalpasso
Boolean and Pseudo-Boolean Test Generation for Feedback Bridging Faults
2016 Favalli, Michele; Dalpasso, Marcello
Bridging fault modeling and simulation for deep submicron CMOS ICs
file con accesso da definire2002 Favalli, Michele; Dalpasso, M.
Bridging Faults in Pipelined Circuits Journal of Electronic Testing, Theory and Applications
file con accesso da definire2000 Favalli, Michele; Metra, C.
Bus crosstalk fault-detection capabilities of error-detecting codes for on-line testing
file con accesso da definire1999 Favalli, Michele; Metra, C.
Concurrent checking of clock signal correctness
file con accesso da definire1998 Metra, C; Favalli, Michele; Ricco, B.
Concurrent detection of power supply noise
file con accesso da definire2003 Metra, C; Schiano, L; Favalli, Michele
Correlation between IDDQ Testing Quality and Sensor Accuracy
file con accesso da definire1995 Dalpasso, M; Favalli, Michele; Olivo, Piero
| Titolo | Data di pubblicazione | Autore(i) | File |
|---|---|---|---|
| "Victim gate" crosstalk fault model | 2004 | Favalli, Michele | file con accesso da definire |
| A Boolean model for delay fault testing of emerging digital technologies based on ambipolar devices | 2018 | Dalpasso, Marcello; Bertozzi, Davide; Favalli, Michele | |
| A Built-In Self-Testing Framework for Asynchronous Bundled-Data NoC Switches Resilient to Delay Variations | 2016 | Miorandi, Gabriele; Bertozzi, Davide; Favalli, Michele; Celin, Alberto | file con accesso da definire |
| A Complete Self-Testing and Self-Configuring NoC Infrastructure for Cost-Effective MPSoCs | 2013 | Ghiribaldi, Alberto; Ludovici, Daniele; F., Trivino; Strano, Alessandro; J., Flich; J. L., Sanche...z; F., Alfaro; Favalli, Michele; Bertozzi, Davide | file con accesso da definire |
| A fuzzy model for path delay fault detection | 2005 | Favalli, Michele | file con accesso da definire |
| A Probabilistic Fault Model for “Analog” Faults in Digital CMOS Circuits | 1992 | Favalli, M.; Olivo, P.; Ricco, B. | file con accesso da definire |
| A SAT Based Test Generation Method for Delay Fault Testing of Macro Based Circuits | 2011 | Mele, Santino; Favalli, Michele | file con accesso da definire |
| A scalable bidimensional randomization scheme for tlc 3d nand flash memories | 2021 | Favalli, M.; Zambelli, C.; Marelli, A.; Micheloni, R.; Olivo, P. | |
| A Synthesis Toolflow for the Predictable Implementation of High-Performance Bundled-Data Asynchronous NoCs on FPGA | 2025 | Chessa, Giuseppe; Bellodi, Elena; Favalli, Michele; Zoni, Davide; Bertozzi, Davide | |
| AIDA4Edge: Twinning for Excellence in Adaptive Edge Artificial Intelligence | 2025 | Andjelkovic, Marko; Syed, Rizwan Tariq; Veronesi, Alessandro; Vargas, Fabian; Ulbricht, Markus; P...oehls, Leticia Bolzani; Krstic, Milos; Bertozzi, Davide; Jones, Edward G.; Rhodes, Oliver; Zese, Riccardo; Favalli, Michele; Bizzarri, Alice; Lamma, Evelina; Gavanelli, Marco; Bellodi, Elena; Peric, Zoran; Nikolic, Jelena; Dincic, Milan; Jovanovic, Aleksandra; Ciric, Dejan; Vucic, Nikola; Peric, Sofija; Jovanovic, Jelena; Stojanovic, Milica; Nikolic, Tatjana; Nikolic, Goran; Nedeljkovic, Jelena; Dankovic, Danijel; Zivanovic, Emilija; Marjanovic, Milos; Veljkovic, Sandra; Mitrovic, Nikola; Predic, Bratislav; Milovanovic, Tamara | |
| An evolutionary approach to the design of on chip pseudorandom test generators | 2002 | Dalpasso, M.; Favalli, Michele | file con accesso da definire |
| Annotated bit flip fault model | 2004 | Favalli, Michele | file con accesso da definire |
| Applications of Boolean Satisfiability to Verification and Testing of Switch-Level Circuits | 2014 | Favalli, Michele; Marcello, Dalpasso | file con accesso da definire |
| Boolean and Pseudo-Boolean Test Generation for Feedback Bridging Faults | 2016 | Favalli, Michele; Dalpasso, Marcello | |
| Bridging fault modeling and simulation for deep submicron CMOS ICs | 2002 | Favalli, Michele; Dalpasso, M. | file con accesso da definire |
| Bridging Faults in Pipelined Circuits Journal of Electronic Testing, Theory and Applications | 2000 | Favalli, Michele; Metra, C. | file con accesso da definire |
| Bus crosstalk fault-detection capabilities of error-detecting codes for on-line testing | 1999 | Favalli, Michele; Metra, C. | file con accesso da definire |
| Concurrent checking of clock signal correctness | 1998 | Metra, C; Favalli, Michele; Ricco, B. | file con accesso da definire |
| Concurrent detection of power supply noise | 2003 | Metra, C; Schiano, L; Favalli, Michele | file con accesso da definire |
| Correlation between IDDQ Testing Quality and Sensor Accuracy | 1995 | Dalpasso, M; Favalli, Michele; Olivo, Piero | file con accesso da definire |