We describe a VLSI-based processing system performing X-Y coincidence at a very high rate in the synchronous mode. The processor has been designed for applications in digital mammography with two-sided μ-strip silicon detectors but can be used to provide the computational section of any imaging system that needs fast coincidence. The VLSI chip has been successfully tested on a 32 + 32 channels DAQ chain.

A high-rate X-Y coincidence VLSI system for 2-D imaging detectors

GAMBACCINI, Mauro;TRIPICCIONE, Raffaele
1997

Abstract

We describe a VLSI-based processing system performing X-Y coincidence at a very high rate in the synchronous mode. The processor has been designed for applications in digital mammography with two-sided μ-strip silicon detectors but can be used to provide the computational section of any imaging system that needs fast coincidence. The VLSI chip has been successfully tested on a 32 + 32 channels DAQ chain.
1997
Delguerra, A; Gambaccini, Mauro; Marchesini, R; Bertolucci, E; Conti, M; Russo, P; Beccherle, R; Bisogni, Mg; Bottigli, U; Fantacci, E; Rosso, V; Stefanini, A; Tripiccione, Raffaele
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Utilizza questo identificativo per citare o creare un link a questo documento: https://hdl.handle.net/11392/1203364
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