The design and the manufacturing of ReRAM test structures allow deeper insight in the performance of the FORMING, RESET, and SET operations at array level, providing details on the process induced variability of the technology, and on the potential sources of failures. Test structures allow also demonstrating the integration capability of the ReRAM technology using a CMOS-compatible process ramping up such non-volatile memory to a maturity level.
Statistical analysis of resistive switching characteristics in ReRAM test arrays
ZAMBELLI, Cristian;GROSSI, Alessandro;OLIVO, Piero;
2014
Abstract
The design and the manufacturing of ReRAM test structures allow deeper insight in the performance of the FORMING, RESET, and SET operations at array level, providing details on the process induced variability of the technology, and on the potential sources of failures. Test structures allow also demonstrating the integration capability of the ReRAM technology using a CMOS-compatible process ramping up such non-volatile memory to a maturity level.File in questo prodotto:
Non ci sono file associati a questo prodotto.
I documenti in SFERA sono protetti da copyright e tutti i diritti sono riservati, salvo diversa indicazione.
