We introduce noise-sensitive areas (NSAs) to represent noise margins for voltage-mode on-chip signaling. NSAs can be used to compute the maximum bit rate compatible with noise margins, and to compare the performance of different signaling schemes. We apply the proposed technique to receivers based on CMOS buffers and Schmitt triggers. ©2002 IEEE.
Dealing with noise margins in high-speed voltage-mode signaling
BOGLIOLO, Alessandro;OLIVO, Piero
2002
Abstract
We introduce noise-sensitive areas (NSAs) to represent noise margins for voltage-mode on-chip signaling. NSAs can be used to compute the maximum bit rate compatible with noise margins, and to compare the performance of different signaling schemes. We apply the proposed technique to receivers based on CMOS buffers and Schmitt triggers. ©2002 IEEE.File in questo prodotto:
Non ci sono file associati a questo prodotto.
I documenti in SFERA sono protetti da copyright e tutti i diritti sono riservati, salvo diversa indicazione.


