We introduce noise-sensitive areas (NSAs) to represent noise margins for voltage-mode on-chip signaling. NSAs can be used to compute the maximum bit rate compatible with noise margins, and to compare the performance of different signaling schemes. We apply the proposed technique to receivers based on CMOS buffers and Schmitt triggers. ©2002 IEEE.

Dealing with noise margins in high-speed voltage-mode signaling

BOGLIOLO, Alessandro;OLIVO, Piero
2002

Abstract

We introduce noise-sensitive areas (NSAs) to represent noise margins for voltage-mode on-chip signaling. NSAs can be used to compute the maximum bit rate compatible with noise margins, and to compare the performance of different signaling schemes. We apply the proposed technique to receivers based on CMOS buffers and Schmitt triggers. ©2002 IEEE.
2002
9780780398214
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Utilizza questo identificativo per citare o creare un link a questo documento: https://hdl.handle.net/11392/1194271
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