This chapter presents the latest advances in energy-efficient NoC design. Early NoC architectures are clearly power and area inefficient, thus calling for power optimization techniques. The chapter illustrates low power design techniques at several levels of abstraction in the NoC design process.
Energy-Efficient Network on Chip Design
BERTOZZI, Davide;
2004
Abstract
This chapter presents the latest advances in energy-efficient NoC design. Early NoC architectures are clearly power and area inefficient, thus calling for power optimization techniques. The chapter illustrates low power design techniques at several levels of abstraction in the NoC design process.File in questo prodotto:
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